the storage anarchist

3.019: fast vp - world's smartest storage tiering (part 2)

In Part 1 of this article, I discussed how the new VMAX FAST VP is highly differentiated when it comes to implementation, architecture, algorithms and simplicity. In Part 2 I focus on differentiation in the granularity of data management and in the advanced controls for FAST VP.

Before I dive in, I also wanted to re-iterate that FAST VP is not the end-game for EMC’s investments in automated tiering. As we’ve said since we introduced the concept back in April 2009, EMC’s FAST Vision (and roadmap) is laid out in 5 stages, of which FAST VP is only the 2nd. Over the coming months and years, you will see EMC extend FAST in a progression:

1. Thick: VMAX FAST V1 provided policy-based optimization at the Full LUN level
2. Thin: VMAX FAST VP provides sub-LUN automated optimization
3. Small: Next up will be the incorporation of data reduction technologies to reduce the footprint of both idle and active data
4. Green: This phase will take efficiency to another level, moving idle data to spindle groups that will be automatically spun down until the data is actually needed
5. Gone: Finally, aged data blocks will be archived out of the VMAX itself to external archive platforms (like the one announced during the Record Breakers launch today)

So, in addition to the unique value propositions offered by The World’s Smartest Storage Tiering product, EMC’s larger vision is also highly differentiated. Although I do expect others will try to copy our vision as well…

On to Part 2!

 

3.018: fast vp - world's smartest storage tiering (part 1)

With the availability of VMAX Fully Automated Storage Tiering for Virtual Pools (FAST VP), there will undoubtedly be a raft of "we were first" and "me too" claims from competitors.

I will preemptively respond to both in this post.

As I've said many times before, being "first" in the market only really matters for as long as you are also "the only." As soon as there are more than one supplier of a feature, the discussion moves on to "which implementation is better."

I hereby assert than VMAX FAST VP is the smartest, most efficient, fastest,
easiest and most affordable sub-LUN automated tiering available in the market today
(and for the foreseeable future)

Second, I contend that no other vendors' automated tiering offering even comes close to VMAX FAST VP – and thus nobody has a basis for claiming "me too."

As I hope to explain, effective automated storage tiering requires much, much more than the basic ability to relocate data across tiers at a sub-LUN granularity. To even be considered as a contender, competitors will have to address three areas of FAST VP differentiation:

1. Effective Implementation
2. Granular Data Management
3. Advanced Controls

For each of these I will propose some questions the customers may want to consider when comparing implementations, along with the specific unique advantages offered by VMAX FAST VP.

I have split this post into two parts (it got a little longer than I planned).

Part 1 follows…

3.017: vmax 2011 edition - powerful. trusted. smartest.

In the 20 months since its launch back in April of 2009, VMAX has literally redefined the storage landscape. Back then, EMC focused the messaging around how VMAX was purpose-built for the virtual data center, leveraging multi-core Intel technology to deliver a highly efficient and scalable modular and tiered enterprise storage platform. We introduced the new Virtual Matrix architecture, the first array built upon that architecture, and the first wave of automation that has simplified the whole deployment model of Symmetrix storage.

EMC also did a bit of a Babe Ruth at that launch – pointing to the bleachers where we intended to deliver, in two phases, the innovation of Fully Automated Storage Tiering. FAST v1 for VMAX began shipping just about a year ago.

On December 15th, 2010 the second phase of FAST began shipping, along with more than 50 other significant features and new products in what we now call Enginuity 5875. Included also were some new hardware updates to VMAX – a new native 10Gb Ethernet director for SRDF and iSCSI, plus a new VMAX engine that sports an encrypting back-end to support Data at Rest Encryption.

Today (January 18th, 2010), EMC publicly announces what is inarguably the largest set of new storage products ever to be simultaneously introduced on one day. With over 40 new products and scores of new features, today's launch truly lives up to its Record Breaker theme. (If by chance you've missed all the hype, there's still time to learn about it at the #EMCBreaksRecords web site.)

So, what's all the hype about? Well, for the full effect, you'll have to go see for yourself. But within the context of VMAX, there's lots of new things in this latest release of Enginuity 5875, and I thought I'd lead off my contribution to the launch day communications with a quick run through of the major ones…

 

3.016: commodity vs. custom, hu cares?

Nigel Poulton has written a fair and insightful post over on his blog comparing EMC’s VMAX to Hitachi’s VSP. In it, he notes Hitachi’s use of not one but FIVE custom ASICs, as compared to VMAX’s single custom chip. He also (rightfully, IMHO) points out that it is likely these custom ASICs that caused Hitachi Japan to deliver VSP to market nearly 18 months later than VMAX, even though both use the same generation of Intel processor (quad-core Harperton) and the same first generation PCIe.

Even for a vertically-integrated company like Hitachi, ASICs take time – a LOT of time – to get right. Mess up one little thing, and you face months to respin the design and recast the die. And if you are doing low-latency memory I/O management, you face another respin each time the architecture changes; chips built for the PCIe gen 1 interface won’t work for PCIe gen 2 or 3, for example.

Hitachi’s Japanese engineering teams have invested heavily in the “hybrid” ASIC/Intel design for this “first generation” VSP. Maybe they had no choice – the USPV architecture doesn’t adapt well into Intel’s chip designs, where memory and CPU are tightly coupled, and not separated by a crossbar switch as is the foundation of the USP/USPV/VSP. By the way, I don’t think Hitachi’s architecture can survive long-term – in fact, I suspect that Hitachi Japan is hard at work right now re-architecting future VSP follow-ons to eliminate all the ASICs from their design. Looking at the designs of Intel’s next generation processors (Sandy Bridge/Ivy Bridge), they really have no other option.

This leaves Hitachi Data Systems’ marketing with no choice but to try to position the (temporary) use of ASICs as an advantage – even though it has already proven a significant time-to-market disadvantage. Japan has sent lemons, HDS has to make lemonade while they wait for the elves to finish redesigning their flagship enterprise array.

But back to Nigel’s post…